Engineering Seminar Topics and Seminar Topics

Download Full Article  Tiger SHARC processor

In the past three years  several multiple data path and pipelined digital signal processors have been introduced into the marketplace. This new generation of DSP’s takes advantage of higher levels of integrations than were available for their predecessors. The Tiger SHARC processor is the newest and most power member of this family which incorporates many mechanisms like SIMD, VLIW and short vector memory access in a single processor. This is the first time that all these techniques have been combined in a real time processor.

The TigerSHARC DSP is an ultra high-performance static superscalar architecture that is optimized for tele-communications infrastructure and other computationally demanding applications. This unique architecture combines elements of RISC, VLIW, and standard DSP processors to provide native support for 8, 16, and 32-bit fixed, as well as floating-point data types on a single chip.

Large on-chip memory, extremely high internal and external bandwidths and dual compute blocks provide the necessary capabilities to handle a vast array of computationally demanding, large signal processing tasks.            

2. DIGITAL SIGNAL PROCESSOR

Strictly speaking, the term “DSP” applies to any microprocessor that operates on digitally represented signals. In practice, however, the term refers to microprocessors specifically designed to perform digital signal processing tasks. Because most signal processing systems perform complicated mathematical operations on real-time signals, DSPs use special architectures to accelerate repetitive, numerically intensive calculations. For example, DSP architectures commonly include circuitry to rapidly perform multiply accumulate operations, which are useful in many signal-processing algorithms. Also, DSPs often contain multiple-access memory architectures that allow the processor to simultaneously load multiple operands. In addition, DSPs often include a variety of special memory addressing modes and program-flow control features designed to accelerate the execution of repetitive operations. Lastly, most DSP processors include specialized on-chip peripherals or I/O interfaces that allow the processor to efficiently interface with other system components, such as analog-to-digital converters and host processors.

Before going into the details of the Tiger SHARC architecture let us familiarize with a few architectural techniques which are the key elements of this new DSP.

1. VLIW- Very Long Instruction Word

VLIW points to the instructions that specify more than one concurrent operation in a single instruction. The following features characterize it: -

Ø    Instruction width is quite large taking many bits to encode multiple operations.

ØRely on software to pack the collection of operation (compaction).

ØIn code with limited instruction parallelism, most of the instruction is wasted with no operation.

2. SIMD: - Single Instruction Multiple Data

A very important class of architectures in the history of computation, single-instruction/multiple-data machines is capable of applying the exact same instruction stream to multiple streams of data simultaneously. For certain classes of problems, e.g., those known as data-parallel problems, this type of architecture is perfectly suited to achieving very high processing rates, as the data can be split into many different independent pieces, and the multiple instruction units can all operate on them at the same time.

                        SIMD (Single-Instruction Stream Multiple-Data Stream) architectures are essential in the parallel world of computers. Their ability to manipulate large vectors and matrices in minimal time has created a phenomenal demand in such areas as weather data and cancer radiation research. The power behind this type of architecture can be seen when the number of processor elements is equivalent to the size of your vector. In this situation, component wise addition and multiplication of vector elements can be done simultaneously. Even when the size of the vector is larger than the number of processors elements available, the speedup, compared to a sequential algorithm, is immense. There are two types of SIMD architectures. The first is the True SIMD followed by the Pipelined SIMD. Each has its own advantages and disadvantages but their common attribute is superior ability to manipulate vectors.

            The CPU can perform high-speed arithmetic operations within one instruction cycle because of its parallel and combinational architectural design. There are two execution units in the processor in order to facilitate the SIMD mode of operation of the processor. Only one execution unit is used in case of SISD operation. The SIMD mode is characterized by multiple instances of the same operation on different data.

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Download Full Article Small Computer System Interface

SCSI is actually an acronym for Small Computer System Interface and it is pronounced as “skuzzy”. It is the second-most popular hard disk interface used in PCs today. It’s a high-speed, intelligent peripheral I/O bus with a device independent protocol for transferring data between different types of peripheral devices. The SCSI bus connects all parts of a computer system so that they can communicate with each other. The bus frees the host processor from the responsibility of I/O internal tasks. A SCSI bus can be either internal, external, or cross the boundary from internal to external. The SCSI protocol is a peer-to-peer relationship: one device does not have to be subordinated to another device in order to perform I/0 activities. Only two of these devices can communicate on the bus at any given time.

          Each SCSI bus can connect up to 8 or up to 16 peripherals; one of those devices will always be the computer or the SCSI card, because they too are devices on the SCSI. SCSI devices are designated as either initiators (drivers) or targets (receivers) and the interface to the host computer is called the host adapter. Every device connected to the bus will have a different SCSI ID, ranging from 0 to 7. The host adapter takes up one ID leaving 7 ID’s for other hardware. SCSI hardware typically consists of hard drives, tape drives, CD-ROMs, printers and scanners. .

The reason for the slow taking of SCSI is the lack of standard. Each company seems to have its own idea of how SCSI should work. While the connections themselves have been standardized, the actual driver specs used for communication have not been. The end result is that each piece of SCSI hardware has its own host adapter. So, due to the lack of an adapter standard, a standardized software interface, and a standard BIOS for hard drives attached to the SCSI. Adapter.

History & Evolution

In the beginning, one couldn’t even use a hard drive on the bus. This was mainly because the BIOS in those systems were designed to use the ST506/412 controller. With the IDE, the BIOS was easily changed because of the similarity to ST506/412 on the WD1003 controller. At the register level, though, SCSI was very different, and would have required an entirely new set of BIOS in the PC.

What we currently know of as the SCSI interface had its beginnings back in 1979. Shugart Associates, led by storage industry pioneer Alan Shugart (who was a leader in the development of the floppy disk, and later founded Seagate Technology) created the Shugart Associates Systems Interface (SASI). This very early predecessor of SCSI was very rudimentary in terms of its capabilities, supporting only a limited set of commands compared to even fairly early “true” SCSI, and rather slow signaling speeds of 1.5 Mbytes/second. For its time, SASI was a great idea, since it was the first attempt to define an intelligent storage interface for small computers. The limitations must be considered in light of the era: we are talking about a time when 8″ floppy drives were still being commonly used.

Shugart wanted to get SASI made into an ANSI standard, presumably to make it more widely-accepted in the industry. In 1981, Shugart Associates teamed up with NCR Corporation, and convinced ANSI to set up a committee to standardize the interface. In 1982, the X3T9.2 technical committee was formed to work on standardizing SASI. A number of changes were made to the interface to widen the command set and improve performance. The name was also changed to SCSI; I don’t know the official reason for this, but I suspect that having Shugart Associates’ name on the interface would have implied that it was proprietary and not an industry standard. The first “true” SCSI interface standard was published in 1986, and evolutionary changes to the interface have been occurring since that time.

It’s important to remember that SCSI is, at its heart, a system interface, as the name suggests. It was first developed for hard disks, is still used most for hard disks, and is often compared to IDE/ATA, which is also used primarily for hard disks. For those reasons, SCSI is sometimes thought of as a hard disk interface. However, SCSI is not an interface tied specifically to hard disks. Any type of device can be present on the bus, and the very design of SCSI means that these are “peers” of sorts–though the host adapter is sort of a “first among equals”.  SCSI was designed from the ground up to be a high-level, expandable, high-performance interface. For this reason, it is frequently the choice of high-end computer users. It includes many commands and special features, and also supports the highest-performance storage devices.

Of course, these features don’t come for free. Most PC systems do not provide native, “built in” support for SCSI the way they do for IDE/ATA, which is one of the key reasons why SCSI isn’t nearly as common as IDE/ATA in the PC world. Implementing SCSI on a PC typically involves the purchase of a storage device of course, but also a special card called a host adapter. Special cables and terminators may also be required. All of this means that deciding between SCSI and IDE/ATA is an exercise in tradeoffs.

SCSI began as a parallel interface, allowing the connection of devices to a PC or other systems with data being transmitted across multiple data lines. Today, parallel or “regular” SCSI is still the focus of most SCSI users, especially in the PC world. SCSI itself, however, has been broadened greatly in terms of its scope, and now includes a wide variety of related technologies and standards, as defined in the SCSI-3 standard. Many high-end systems have built-in SCSI support. There is usually an adapter card or an adapter built in to the motherboard. This native support for SCSI was set in motion by IBM. Their example was followed by many manufacturers. As a result, SCSI integration is becoming very easy to work with and will get easier as technology progresses.

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Download Full Article Hyper-Threading

           Hyper-Threading technology is a groundbreaking innovation from Intel that enables multi-threaded server software applications to execute threads in parallel within each processor in a server platform. The Intel® Xeon™ processor family uses Hyper-Threading technology, along with the Intel® NetBurst™ microarchitecture, to increase compute power and throughput for today’s Internet, e-Business, and enterprise server applications. This level of threading technology has never been seen before in a general-purpose microprocessor. Hyper-Threading technology helps increase transaction rates, reduces end-user response times, and enhances business productivity providing a competitive edge to e-Businesses and the enterprise. The Intel® Xeon™ processor family for servers represents the next leap forward in processor design and performance by being the first Intel® processor to support thread-level parallelism on a single processor.

           With processor and application parallelism becoming more prevalent, today’s server platforms are increasingly turning to threading as a way of increasing overall system performance. Server applications have been threaded (split into multiple streams of instructions) to take advantage of multiple processors. Multi-processing-aware operating systems can schedule these threads for processing in parallel, across multiple processors within the server system. These same applications can run unmodified on the Intel® Xeon™ processor family for servers and take advantage of thread-level-parallelism on each processor in the system. Hyper-Threading technology complements traditional multi-processing by offering greater parallelism and performance headroom for threaded software.

Overview of Hyper-Threading Technology

         Hyper-Threading technology is a form of simultaneous multi-threading technology (SMT), where multiple threads of software applications can be run simultaneously on one processor. This is achieved by duplicating the architectural state on each processor, while sharing one set of processor execution resources. The architectural state tracks the flow of a program or thread, and the execution resources are the units on the processor that do the work: add, multiply, load, etc.

         Dual-processing (DP) server applications in the areas of Web serving, search engines, security, streaming media, departmental or small business databases, and e- mail/file/print can realize benefits from Hyper-Threading technology using Intel® Xeon™ processor-based servers.

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Download Full Article Computer memory based on the protein bacterio-rhodopsin

        Since the dawn of time, man has tried to record important events and techniques for everyday life. At first, it was sufficient to paint on the family cave wall how one hunted. Then came the people who invented spoken languages and the need arose to record what one was saying without hearing it firsthand. Therefore, years later, earlier scholars invented writing to convey what was being said. Pictures gave way to letters which represented spoken sounds. Eventually clay tablets gave way to parchment, which gave way to paper. Paper was, and still is, the main way people convey information. However, in the mid twentieth century computers began to come into general use . . .

        Computers have gone through their own evolution in storage media. In the forties, fifties, and sixties, everyone who took a computer course used punched cards to give the computer information and store data. In 1956, researchers at IBM developed the first disk storage system. This was called RAMAC (Random Access Method of Accounting and Control)

        Since the days of punch cards, computer manufacturers have strived to squeeze more data into smaller spaces. That mission has produced both competing and complementary data storage technology including electronic circuits, magnetic media like hard disks and tape, and optical media such as compact disks.

        Today, companies constantly push the limits of these technologies to improve their speed, reliability, and throughput — all while reducing cost. The fastest and most expensive storage technology today is based on electronic storage in a circuit such as a solid state “disk drive” or flash RAM. This technology is getting faster and is able to store more information thanks to improved circuit manufacturing techniques that shrink the sizes of the chip features. Plans are underway for putting up to a gigabyte of data onto a single chip.

        Magnetic storage technologies used for most computer hard disks are the most common and provide the best value for fast access to a large storage space. At the low end, disk drives cost as little as 25 cents per megabyte and provide access time to data in ten milliseconds. Drives can be ganged to improve reliability or throughput in a Redundant Array of Inexpensive Disks (RAID). Magnetic tape is somewhat slower than disk, but it is significantly cheaper per megabyte. At the high end, manufacturers are starting to ship tapes that hold 40 gigabytes of data. These can be arrayed together into a Redundant Array of Inexpensive Tapes (RAIT), if the throughput needs to be increased beyond the capability of one drive.

        For randomly accessible removable storage, manufacturers are beginning to ship low-cost cartridges that combine the speed and random access of a hard drive with the low cost of tape. These drives can store from 100 megabytes to more than one gigabyte per cartridge.

        Standard compact disks are also gaining a reputation as an incredibly cheap way of delivering data to desktops. They are the cheapest distribution medium around when purchased in large quantities ($1 per 650 megabyte disk). This explains why so much software is sold on CD-ROM today. With desktop CD-ROM recorders, individuals are able to publish their own CD-ROMs.

        With existing methods fast approaching their limits, it is no wonder that a number of new storage technologies are developing. Currently, researches are looking at protien-based memory to compete with the speed of electronic memory, the reliability of magnetic hard-disks, and the capacities of optical/magnetic storage. We contend that three-dimensional optical memory devices made from bacteriorhodopsin utilizing the two photon read and write-method is such a technology with which the future of memory lies.

    In a prototype memory system, bacteriorhodopsin stores data in a 3-D matrix. The matrix can be build by placing the protein into a cuvette (a transparent vessel) filled with a polyacrylamide gel. The protein, which is in the bR state, gets fixed in by the polymerization of the gel. A battery of Krypton lasers and a charge-injection device (CID) array surround the cuvette and are used to write and read data.

        While a molecule changes states within microseconds, the combined steps to read or write operation take about 10 milliseconds. However like the holographic storage, this device obtains data pages in parallel, so a 10 Mbps is possible. This speed is similar to that of slow semiconductor memory.

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Download Full Article  Asymmetric Digital Subscriber Lines

          ADSL technology is asymmetric. It allows more bandwidth downstream –from an NSP’s central office to customer site – than upstream from the subscriber to the central office. This asymmetry, companied with always-on access (which eliminates call setup), makes ADSL ideal for Internet/intranet surfing, video- on –demand, and remote LAN access. Uses of this application typically download much more information than they send.

             ADSL transmits more than 6 Mbps to a subscriber, and as much as 640Kbps more in both directions. Such rate expands existing access capacity by a factor of 50 or more with out new cabling. ADSL can literally transform the existing public information network from one limited to voice, text, and low-resolution graphics to a powerful, ubiquitous system capable of bringing multimedia, including full motion video, to every home this century.

           ADSL will play a crucial role over the next decade or more as telephone companies enter new markets for delivery information in video and multimedia formats. New broadband cabling will take decades to reach all prospective subscribers. Success of these new services will depend on reaching as many subscribers as possible during the first few years. By bringing movies, television, video catalogs, remote CD-ROMs, corporate LANs and the internet into homes and small businesses, ADSL will makes these markets viable and profitable for telephone company and application suppliers.

Download Full Article  Asymmetric Digital Subscriber Lines